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Digital Design Engineer Principal - ASIC/FPGA for RF SoC ASIC

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  • Posted By: Twinserve Ltd
  • Address:
  • Date Posted: 9th Feb 2010
  • Salary: GBP per annum
  • Location: Cambridge (CB)
  • Reference Code: 2185486
  • Views Since Posting: 349
  • Full Description:


Digital Design Engineer Principal ASIC/FPGA for RF SoC ASIC's

We are looking for a excellent Digital Principal Engineer to act as a the key contributor to the ASIC design, implementation and verification of a range of RF wireless chips. In addition to coding in RTL and performing verification using appropriate tools, the Principal Engineer will contribute to design architecture and the definition of new features and market driven enhancements for IC chips.

The Principal Engineer is responsible for the delivery of complex components of a chip design working with the analogue and software engineers, business units, and suppliers.

Required Experience:

  • You will have extensive experience in digital design and verification techniques and excellent knowledge or RTL coding language.
  • Proven track record of designing efficient digital circuits of significant complexity.
  • You will have good FPGA design for ASIC emulation and ideally Digital Physical Design flow for System on Chip ASIC or experience of analogue and RF design for System on Chip ASIC
  • Proven track record of delivering complex tasks on schedule
  • Able to coordinate and lead the activities of other engineers
  • Degree (or equivalent qualification) in maths/science/electronics

Bonus Skills:

  • Ability to coordinate medium-sized digital design projects
  • Experience of FPGA design for ASIC emulation
  • Experience of Digital Physical Design flow for System on Chip ASIC
  • Experience of analogue and RF design for System on Chip ASIC
  • Experience of development in C for Embedded processors

Location: Cambridge, UK

Excellent package, bonus and benefits, salary up to £46,000 - £65,000

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