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Digital Design Engineer Principal ASIC/FPGA for RF SoC ASIC's
We are looking for a excellent Digital Principal Engineer to act as a the key contributor to the ASIC design, implementation and verification of a range of RF wireless chips. In addition to coding in RTL and performing verification using appropriate tools, the Principal Engineer will contribute to design architecture and the definition of new features and market driven enhancements for IC chips.
The Principal Engineer is responsible for the delivery of complex components of a chip design working with the analogue and software engineers, business units, and suppliers.
Required Experience:
Bonus Skills:
Location: Cambridge, UK
Excellent package, bonus and benefits, salary up to £46,000 - £65,000
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